They appeared in court not to raise defences, but to challenge the court jurisdiction. 他们来法院不是应诉,而是抗辩。
The ZLIB compression algorithm requires more processor time but works well when applied to more varied data. ZLIB压缩算法需要更多的处理器时间,但适用于更具变化性的数据。
The run length encoding ( RLE) compression algorithm requires very little processor time and works well for data that has lots of the same byte value repeated in consecutive locations. 行程编码(RLE)压缩算法需要非常少的处理器时间,适用于在连续位置重复许多相同字节值的数据。
The difficulties of designing video coding algorithm on multi-core processor are illuminated, and finally the future works are demonstrated. 总结基于多核处理器进行视频编码设计可能遇到的问题,并指出了未来的研究方向。
Implement of 3DES Encryption Algorithm Based on ARM Processor 基于ARM的3DES加密算法实现
The Algorithm on Processor Noise Estimate with Colored Measurement Noise 有色测量噪声下的输入白噪声估计算法
To improve the efficiency of Advanced Encryption Standard ( AES) algorithm on ARM processor, an optimization of AES was introduced and realized on ARM920T processor. 为了提高高级加密标准(AES)算法在ARM上执行的效率,提出AES算法在ARM处理器上的高效实现方案,并在ARM920T处理器上得以实现。
Time-based cache attacks analyzes the time difference in the execution of algorithm over a processor, and recovers the secret key. 基于时间的缓存攻击是指通过分析处理器中算法的不同执行时间来恢复密钥的攻击。
The extension of media instruction on the general processor make the real-time multimedia processing algorithm based on processor possible. 通用处理器媒体指令扩展技术的发展,使得基于处理器的实时媒体处理算法成为可能。
The paper introduces the set partitioning optimization problem, presents several specific applications of the problem, proposes the ordinary GA solutions to the problem, and designs a specific algorithm for processor distribution. 文章介绍了一类带约束的集合划分优化问题,给出了这个一般问题的几个具体应用,提出了用遗传算法解决这类问题的一般方法,并针对其中的处理机分配问题设计了具体的算法。
Design and Implementation of Scheduling Algorithm in Network Processor 队列调度在网络处理器中的设计与实现
Firstly, the characteristics and applications of the PC/ 104is introduced. Then the PC/ 104, as a complicated algorithm processor, fulfills the complicated algorithm, and the DSP, as a interface processor, implements data conversion and pretreatment of opera-tion. 首先介绍了PC/104模块的特点及其应用技术,然后以PC/104为算法处理机,完成复杂算法。以数字信号处理器为接口处理机,主要完成数据转换和运算的预处理。
Algorithm for Processor Allocation in Parallel Query 并行查询中的处理机分派算法研究
Then it study the scheduling of distributed parallel operating system specially, that is the algorithm of assigning processor and analyze the existent algorithm of scheduling. 接着专门讨论了分布式并行操作系统中的调度,主要是处理机的分配算法,并对若干种现有的调度算法进行了深入分析。
A new competitive on-line algorithm for two processor overload real-time systems 两台机器超载实时系统的On-line算法
Improvement of Longest Prefix Match Algorithm in Network Processor 网络处理器中最长匹配算法的优化
729 algorithm on DSP processor stimulator are discussed in this paper. 729算法与其在DSP芯片上的仿真实现。
An Algorithm of Processor Pre-Allocation Based on Task Duplication 基于任务复制的处理器预分配算法
Finally, the implementation of log_MAP algorithm in Digital Signal Processor ( DSP) is discussed. 最后讨论了logMAP算法在数字信号处理器(DSP)中的实现。
To improve branch prediction accuracy, we introduced branch prediction buffer based on two level adaptive branch prediction algorithm in X processor. 为提高分支预测精度,减少分支开销,设计上采用了基于改进的二级自适应分支预测算法,并应用于分支目标缓冲器。
In this algorithm, a new processor selection policy is developed to improve scheduling success ratio. 在该算法中,提出了一个新的处理器选择策略,从而提高了算法的调度成功率。
The models successfully map 2-order IIR filtering algorithm on processor array with 4 processing elements. During the process, a linear and nonlinear programming software-LINGO is used to solve the model. 对IIR滤波算法在4个PE的处理器阵列上的映射建立了模型,并使用LINGO规划软件进行了模型求解。
In this paper a practical and fast R waves detection algorithm based on DSP processor is proposed. 提出了一种实用的基于DSP的R波快速检测算法。
A Job Scheduling Algorithm for Duplex Processor System 双机系统上的一个作业调度算法
For distributed real-time system, combining duplication technique and first-fit method, a fault-tolerant scheduling algorithm is presented based on the analysis of the scheduling algorithm for single processor. 针对分布式实时系统,在分析了单处理调度算法的基础上,结合版本复制技术和首次适应方法,给出了一种容错调度算法。
Secondly, this dissertation offers systemic structure which comprises four parts, as follows: CFAR algorithm processor, data transmission, data buffer, and CPCI bus. 然后构建出了CFAR处理器的系统结构,系统主要包括CFAR算法处理器、数据传输、数据缓存和CPCI总线四个部分。
This paper designs a astronomical image difference algorithm for reconfigurable processor template-T Core, the processor is based on the transport triggered architecture ( TTA, Transport-Triggered Architecture) design. 本论文设计了一个面向天文图像差异算法的可配置处理器&传输触发架构(TTA,Transport-TriggeredArchitecture)的TCore模型。
In order to reduce the burden of CPU, the logical signal circuit is designed based on the processor of CPLD to synthesize the driving pulses, which can achieve control algorithm tasks of processor and digital logic tasks to concurrently process. 设计了基于可编程复杂逻辑器件的信号逻辑合成电路对驱动信号进行合成,实现了处理器的控制算法任务和数字逻辑任务的平行处理,减轻了CPU的负担。
Simulation results show that the proposed algorithm enhance the task receiving rate and fault-tolerant performance, you can get more than the first-fit algorithm higher processor utilization. 模拟实验表明,本文算法在任务接收率和容错性能上有所提升,可以得到比首次适应算法更高的处理器利用率。
The static algorithm fixes the processor frequency of critical sections under the conservative conditions, such that we can obtain the static speed of non-critical sections. 静态算法在静态条件下,固定临界区的运行速度,并求出非临界区部分的静态速度。